NXP Semiconductors
SC18IS600
SPI to I2C-bus interface
Table 15. Additional SPI AC characteristics
Symbol Parameter
Conditions
tSPICLKW
tCSW
tSPILAG1
td
SPICLK HIGH time between two SPI bytes
CS HIGH time
between two SPI transactions
SPI enable lag time 1 in a SPI to I2C-bus transaction
delay time
from last SCLK pulse to SDA LOW in a SPI to I2C-bus
transaction
Min Typ Max Unit
8
-
-
s
refer to Figure 22
s
refer to Figure 23
s
refer to Figure 24
s
SCLK
CS
tSPILEAD
tSPICLKW
SDA
Fig 21. SPI to I2C-bus timing diagram
tCSW
tSPILAG1
td
002aab927
8
tCSW
(μs)
6
002aab929
4
2
0
1.843
3.687
7.373
12.00 18.00
CLKIN frequency (MHz)
Fig 22. tCSW as a function of CLKIN frequency
160
td
(μs)
120
5
tSPILAG1
(μs)
4
002aab930
3
2
1
0
1.843
3.687
7.373
12.00 18.00
CLKIN frequency (MHz)
Fig 23. tSPILAG1 as a function of CLKIN frequency
002aab931
80
40
0
1.843
3.687
7.373
12.00 18.00
CLKIN frequency (MHz)
Fig 24. td as a function of CLKIN frequency
SC18IS600
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7.1 — 20 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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