ST16C550CP40(2003) 查看數據表（PDF） - Exar Corporation
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ST16C550CP40 Datasheet PDF : 35 Pages
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ST16C550
SYMBOL DESCRIPTION
Symbol
-CTS
-DSR
-DTR
-RI
-RTS
RX
TX
Rev. 4.30
Pin
Signal
40 44 48 type
Pin Description
36 40 38
I Clear to Send (active low) - A logic 0 on the -CTS pin indicates
the modem or data set is ready to accept transmit data from
the ST16C550. Status can be tested by reading MSR bit-4.
This pin has no effect on the UART’s transmit or receive
operation.
37 41 39
I Data Set Ready (active low) - A logic 0 on this pin indicates
the modem or data set is powered-on and is ready for data
exchange with the UART. This pin has no effect on the
UART’s transmit or receive operation.
33
37
33
O Data Terminal Ready (active low) - A logic 0 on this pin
indicates that the ST16C550 is powered-on and ready. This
pin can be controlled via the modem control register.
Writing a logic 1 to MCR bit-0 will set the -DTR output to
logic 0, enabling the modem. This pin will be a logic 1 after
writing a logic 0 to MCR bit-0, or after a reset. This pin has
no effect on the UART’s transmit or receive operation.
39 43
41
I Ring Indicator (active low) - A logic 0 on this pin indicates the
modem has received a ringing signal from the telephone
line. A logic 1 transition on this input pin will generate an
interrupt.
32
36
32
O Request to Send (active low) - A logic 0 on the -RTS pin
indicates the transmitter has data ready and waiting to send.
Writing a logic 1 in the modem control register (MCR bit-1)
will set this pin to a logic 0 indicating data is available. After
a reset this pin will be set to a logic 1. This pin has no effect
on the UART’s transmit or receive operation.
10 11
7
I Receive Data - This pin provides the serial receive data
input to the ST16C550. A logic 1 indicates no data or an idle
channel. During the local loop-back mode, the RX input pin is
disabled and TX data is internally connected to the UART RX
Input, internally, see figure 12.
11 13
8
O Transmit Data - This pin provides the serial transmit data
from the ST16C550, the TX signal will be a logic 1 during
reset, idle (no data). During the local loop-back mode, the
TX pin is set to a logic 1 and TX data is internally connected
to the UART RX Input, see figure 12.
7
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