TMC2192 查看數據表（PDF） - Cadeka Microcircuits LLC.
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TMC2192 Datasheet PDF : 69 Pages
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PRODUCT SPECIFICATION
TMC2192
Functional Description
Input Formats
Control Registers for this section
Address
0x05
0x05
0x06
Bit(s)
7
6-4
0
Name
D1OFF
INMODE
TSOUT
The TMC2192 supports YCBCR component sources on the
pixel data port. YCBCR input sources are supported in 10 bit
4:2:2, 20 bit 4:2:2, 20 bit 4:4:4, and 24 bit 4:4:4. In the 4:2:2
cases the color difference components are linearly interpo-
lated to 4:4:4 internally.
Demuxing of multiplexed data streams depends on which
synchronization mode the encoder is operating in. For slave
and genlock modes the falling edge of HSIN must be LOW
prior to the CB data in order to demux the data correctly. For
master mode synchronization the falling edge of HSOUT
must be LOW prior to the Y data in order to demux the data
correctly. Finally, in 656 mode the demuxing of the data
stream is determined by the TRS codes, the first sample after
the TRS is considered a CB sample of the CB Y CR YI
packet.
The control register D1OFF controls the formatting of the
incoming luminance data at the pixel data port. When
D1OFF is HIGH a blanking level of 6410 is subtracted from
the luminance and when D1OFF is LOW the incoming the
pixel data is passed through. The inversion of the MSB’s on
the CB and CR components is controlled by the INMODE
control register.
INMODE 23
00
7
01
9
1x
9
CB
YC BC R
YC BC R
16 15
PD
07
CR
0
0
98
7
0
7
10 9
Figure 1. Input Formats
Y
Y
0
0
2
2192002A
1. INMODE = 00, PD[7:0] = PD[23:16] = CB, PD[15:8] = CR
n = (SY+BR+BU+CBP+AV)*2
0
PXCK
PD[7:0]
Yn-1
Yn
PD[23:16]
CBn-1
PD[15:8]
CRn-1
CBn
CRn
HSIN
HSOUT
(TSOUT = 1)
Y0
CB0
CR0
tSP
tDO
128
x = (SY+BR+BU+CBP)*2
tS
tH
Yx
Yx+1
CBx
CRx
CBx+1
CRx+1
tDO
Figure 2. 24 Bit Input Format
Yx+2
CBx+2
CRx+2
2192003A
2. INMODE = 01, PD[23:14] = YCBCR running at 27MHz.
The PD port is clocked at twice the pixel rate, with the data
organized as CB Y CR Y, with the cosited Y's following the
CB's. In its CCIR-656 time base mode, the demuxed CB, Y,
and CR data is synchronized to the SAV preamble. The first
data value, after the SAV preamble, is treated as a CB data
point in the multiplexed CB, Y, CR Y , D1 data stream.
Note: Figure 3, pixel numbering, reflects the SMPTE-125M
pixel numbering.
REV. 1.0.0 8/13/03
7
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