GLT5160L16-7TC 查看數據表（PDF） - G-Link Technology

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GLT5160L16-7TC

16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM

G-Link Technology  

Mode Register

Burst Length, Burst Type and CAS Latency can be programmed by

setting the mode register (MRS). The mode register stores these

data until the next MRS command, which may be issued when both

banks are in idle state. After tRSC from a MRS command, the

SDRAM is ready for new command.

BA A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 0 WBL 0 Ø

LTMODE

BT

BL

CL

CAS

000

R

001

R

010

2

LATENC

Y MODE 0 1 1

3

100

R

101

R

110

R

111

R

Write Burst Length (WBL)

A9 Length

ø

= BL specified

1

Single bit (BL =

BURST

LENGT

BL BT = 0

000 1

001 2

010 4

011 8

100 R

101 R

110 R

1 1 1 Full Page

BT = 1

1

2

4

8

R

R

R

R

BURST

0

TYPE

1

SEQUENTIAL

INTERLEAVED

CLK

CS

RAS

CAS

WE

BA, A[10:0]

CLK

Command

Address

DQ

READ

Y

CAS

Burst Length

Q0

Q1

Q2

Q3

WRITE

Burst Length

Y

D0

D1

D2

D3

Burst Type

Initial

B

Address L

Column Addressing

A2 A1 A0

Sequential

Interleaved

00080123456701234567

001

1234567010325476

010

2345670123016745

011

3456701232107654

100

4567012345670123

101

5670123454761032

110

6701234567452301

111

7012345676543210

–0040123

0123

–01

1230

1032

–10

2301

2301

–11

3012

3210

––0201

01

––1

10

10

G-LINK Technology

9

DEC. 2003 (Rev.2.4)

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