![](/html/Winbond/17584/page5.png)
TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
DOUT
TRC
TAA
TOH
Read Cycle 2
(Chip Select Controlled)
CS
DOUT
TCLZ
TACS
Read Cycle 3
(Output Enable Controlled)
Address
OE
CS
D OUT
T RC
TAA
T AOE
T OLZ
T ACS
TCLZ
W24129A
TOH
TCHZ
TOH
T OHZ
T CHZ
Publication Release Date: April 1997
-5-
Revision A3