HD64336084 查看數據表（PDF） - Renesas Electronics
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HD64336084 Datasheet PDF : 506 Pages
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Section 6 Power-Down Modes ............................................................................73
6.1 Register Descriptions ........................................................................................................... 74
6.1.1 System Control Register 1 (SYSCR1) .................................................................... 74
6.1.2 System Control Register 2 (SYSCR2) .................................................................... 76
6.1.3 Module Standby Control Register 1 (MSTCR1) .................................................... 77
6.1.4 Module Standby Control Register 2 (MSTCR2) .................................................... 78
6.2 Mode Transitions and States of LSI..................................................................................... 79
6.2.1 Sleep Mode ............................................................................................................. 82
6.2.2 Standby Mode ......................................................................................................... 82
6.2.3 Subsleep Mode........................................................................................................ 82
6.2.4 Subactive Mode ...................................................................................................... 83
6.3 Operating Frequency in Active Mode.................................................................................. 83
6.4 Direct Transition .................................................................................................................. 84
6.4.1 Direct Transition from Active Mode to Subactive Mode ....................................... 84
6.4.2 Direct Transition from Subactive Mode to Active Mode ....................................... 85
6.5 Module Standby Function.................................................................................................... 85
Section 7 ROM ....................................................................................................87
7.1 Block Configuration............................................................................................................. 87
7.2 Register Descriptions ........................................................................................................... 89
7.2.1 Flash Memory Control Register 1 (FLMCR1)........................................................ 89
7.2.2 Flash Memory Control Register 2 (FLMCR2)........................................................ 90
7.2.3 Erase Block Register 1 (EBR1) .............................................................................. 91
7.2.4 Flash Memory Power Control Register (FLPWCR) ............................................... 92
7.2.5 Flash Memory Enable Register (FENR) ................................................................. 92
7.3 On-Board Programming Modes........................................................................................... 93
7.3.1 Boot Mode .............................................................................................................. 94
7.3.2 Programming/Erasing in User Program Mode........................................................ 96
7.4 Flash Memory Programming/Erasing .................................................................................. 98
7.4.1 Program/Program-Verify ........................................................................................ 98
7.4.2 Erase/Erase-Verify................................................................................................ 101
7.4.3 Interrupt Handling when Programming/Erasing Flash Memory........................... 101
7.5 Program/Erase Protection .................................................................................................. 103
7.5.1 Hardware Protection ............................................................................................. 103
7.5.2 Software Protection............................................................................................... 103
7.5.3 Error Protection..................................................................................................... 103
7.6 Programmer Mode ............................................................................................................. 104
7.7 Power-Down States for Flash Memory.............................................................................. 104
Rev. 2.00 Sep. 23, 2005 Page xi of xxx
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