MAX2742ECM 查看數據表（PDF） - Maxim Integrated

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MAX2742ECM

Single-Chip Global Positioning System Receiver Front-End

Maxim Integrated 

Single-Chip Global Positioning System

Receiver Front-End

Detailed Description

LNA/Mixer

The RF input from the GPS antenna is fed through an

LNA with a 24dB gain. The amplified signal is then fed

to a mixer that downconverts the signal (1575.42MHz)

to a quadrature differential IF of 1.023MHz.

IF Stage

The quadrature IF signals pass through the IF filter,

which rejects the out-of-band spurs by more than 60dB

and the image noise by 18dB (typ). After the image

reject filter, the signal is converted from quadrature to

differential. The filtered IF signal is then amplified by the

AGC block, which sets the VGA output signal level to a

predetermined value through the application using 50dB

of dynamic range. The internal offset-cancellation mech-

anism generates a highpass characteristic for the IF

section with a 1dB corner frequency of about 100kHz.

IF Output Selection

The sampled outputs of the GPS signal are available in

a single-ended or differential format. The IFSEL pin

controls the output format.

Synthesizer

An on-chip VCO provides quadrature differential LO

signals to the downconverting mixer and controls the

frequency. An on-board TCXO generates the reference

frequency. The integrated synthesizer includes the

VCO, TCXO buffer, main frequency divider, phase-fre-

quency detector, and charge pump. It uses an off-chip

PLL loop filter and TCXO. Connect the output of the

TCXO to XTALIN1 and XTALIN2 through a coupling

capacitor.

The main division ratio for the synthesizer is 684. With this

division ratio, a low-side injection LO can be synthesized

with an 18.414MHz TXCO.

Applications Information

Layout Issues

A properly designed PC board is an essential part of any

RF/microwave circuit. On all high-frequency inputs and

outputs, use controlled impedance lines and keep them

as short as possible to minimize losses and radiation.

Keeping the traces short also reduces parasitic induc-

tance. To further reduce the parasitic inductance, use

wider traces and a solid ground or power plane below

the signal traces. Also, place decoupling capacitors as

close to the supply pins as possible. For proper power

dissipation and operation, connect the metal exposed

paddle solidly to the ground plane of the PC board.

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