N4850A 查看數據表（PDF） - HP => Agilent Technologies

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N4850A

N4850A DigRF v3 Acquisition Probe N4860A DigRF v3 Stimulus Probe

HP => Agilent Technologies 

Introduction to DigRF v3

The DigRF v3 standard was

designed to enable interoperability

between RF-ICs and BB-ICs from

different suppliers. Additional

benefits include reduced cost,

higher bandwidth and extended

battery life.

The physical layer of the DigRF v3

interface consists of six signals

(see Figure 3) with independent

transmit and receive paths.

Additional signals are specified

for diversity mode. The DigRF v3

specification allows for

1.8 V LVDS, 1.2 V LVDS or SLVDS

electrical interface voltages. The

DigRF v3 interface transitions

between high speed, low power

and sleep modes dynamically.

The DigRF v3 standard specifies

data packets and control packets.

Embedded in the data packets is

the digital IQ representation of

the RF signal. Control packets

contain the configuration and

status information necessary

to keep the BB-IC and RF-IC

operating in synchronization.

BB-IC

SYSCLKEN

SYSCLK

Txp

Txn

Rxp

Rxn

RF-IC

Figure 3. DigRF v3 physical interconnect scheme

2

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