UPD72850A 查看數據表（PDF） - NEC => Renesas Technology

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比赛名单

UPD72850A

IEEE1394 400Mbps PHY

NEC => Renesas Technology 

µPD72850A

Figure 3-3. Isolation Barrier Circuits

(a) CTL0,CTL1, D0-Dn Isolation Barrier Circuit

Link

LinkVDD

Required when LinkVD D is 5 V

DVDD

µPD72850A

5 kΩ

100 Ω

5 kΩ

0.001 µF

5 kΩ

0.001 µF

5 kΩ

300 Ω

LinkGND LinkGND

DGND

(b) Link-on Isolation Barrier Circuit

Link

LinkVDD

100 Ω

5 kΩ

0.001 µF

1.6 kΩ

µPD72850A

LinkGND

(c) LPS Isolation Barrier Circuit

Link

DVDD

8.4 kΩ

0.033 µF

1.6 kΩ

10 kΩ

µPD72850A

DGND

Link

(d) LREQ Isolation Barrier Circuit

LinkVDD

Required when LinkVD D is 5 V

DVDD

µPD72850A

5k Ω

100 Ω

5 kΩ

0.001 µF

5 kΩ

0.001 µF

5 kΩ

300 Ω

LinkGND LinkGND

DGND

(e) SCLK Isolation Barrier Circuit

Link

LinkVDD

5 kΩ

DVDD

5 kΩ

µPD72850A

0.001 µF

5 kΩ

LinkGND

5 kΩ

DGND

Data Sheet S14452EJ1V0DS00

17

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