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M95040-RDW3T/G 查看數據表(PDF) - STMicroelectronics

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M95040-RDW3T/G Datasheet PDF : 42 Pages
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Signal description
M95040, M95020, M95010
2.8.4
When VCC has passed the POR threshold voltage, the device is reset and in the following
state:
in Standby Power mode
deselected (at next Power-up, a falling edge is required on Chip Select (S) before any
instruction can be executed)
not in the Hold Condition Status register state:
– the Write Enable Latch (WEL) is reset to 0
– the Write In Progress (WIP) is reset to 0. The SRWD, BP1 and BP0 bits of the
Status Register are at the same logic level as when the device was last powered
down (they are non-volatile bits)
Power-down
At Power-down (continuous decrease of VCC), as soon as VCC drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
At Power-down, the device must be deselected and in Standby Power mode (that is there
should be no internal Write cycle in progress). Chip Select (S) should be allowed to follow
the voltage applied on VCC.
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