Nexperia
74HC595-Q100; 74HCT595-Q100
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
VCC = supply voltage in V.
[6] All 9 outputs switching.
11.1 Waveforms and test circuit
1/ fmax
VI
SHCP input
VM
GND
VOH
tW
t PLH
t PHL
Q7S output
VM
VOL
mna557
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 9. Shift clock pulse, maximum frequency and input to output propagation delays
VI
SHCP input
VM
GND
tsu
VI
1/ fmax
STCP input
VM
GND
VOH
tW
t PLH
t PHL
Qn output
VM
VOL
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 10. Storage clock to output propagation delays
mna558
74HC_HCT595_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 28 February 2017
© Nexperia B.V. 2017. All rights reserved.
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