74HC595PW-Q100 查看數據表（PDF） - NXP Semiconductors.

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74HC595PW-Q100

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

NXP Semiconductors. 

NXP Semiconductors

74HC595-Q100; 74HCT595-Q100

8-bit serial-in, serial or parallel-out shift register with output latches;

3-state

Table 6. Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

40 C to +85 C

Min Typ Max

VOL

LOW-level

VI = VIH or VIL

output voltage all outputs

IO = 20 A; VCC = 2.0 V

IO = 20 A; VCC = 4.5 V

IO = 20 A; VCC = 6.0 V

Q7S output

-

0

0.1

-

0

0.1

-

0

0.1

IO = 4 mA; VCC = 4.5 V

IO = 5.2 mA; VCC = 6.0 V

Qn bus driver outputs

-

0.15 0.33

-

0.16 0.33

IO = 6 mA; VCC = 4.5 V

-

0.15 0.33

IO = 7.8 mA; VCC = 6.0 V

-

0.16 0.33

II

input leakage VI = VCC or GND; VCC = 6.0 V

-

-

1.0

current

IOZ

OFF-state

VI = VIH or VIL; VCC = 6.0 V;

output current VO = VCC or GND

ICC

supply current VI = VCC or GND; IO = 0 A;

VCC = 6.0 V

CI

input

capacitance

-

-

5.0

-

-

80

-

3.5

-

40 C to +125 C Unit

Min

Max

-

0.1 V

-

0.1 V

-

0.1 V

-

0.4 V

-

0.4 V

-

0.4 V

-

0.4 V

-

1.0 A

-

10 A

-

160 A

-

-

pF

74HC_HCT595_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 10 April 2013

© NXP B.V. 2013. All rights reserved.

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