AD8155 查看數據表（PDF） - Analog Devices

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AD8155

XStream™ 6.5 Gbps Dual Buffer Mux/Demux

Analog Devices 

OUTPUT COMPLIANCE

In low voltage applications, users must pay careful attention

to both the differential and common-mode signal levels. The

choice of output voltage swing, preemphasis setting, supply

voltages (VCC and VTTO), and output coupling (ac or dc) affect

peak and settled single-ended voltage swings and the common-

mode shift measured across the output termination resistors.

These choices also affect output current and, consequently,

power consumption. For certain combinations of supply voltage

and output coupling, output voltage swing and preemphasis

settings may violate the single-ended absolute output low

voltage, as specified in Table 1. Under these conditions, the

performance is degraded; therefore, these settings are not

recommended. Table 19 includes annotations that identify these

settings.

Table 19 shows the change in output common mode (ΔVOCM =

VCC − VOCM) with output level (VSW) and preemphasis setting.

Table 19 also shows the minimum and maximum peak single-

ended output levels (VL-PE and VH-PE, respectively). The single-

ended output levels are calculated for VTTO supplies of 3.3 V and

1.8 V for both ac- and dc-coupled outputs to illustrate the

practical challenges of reducing the supply voltage.

TX_HEADROOM

For output levels greater than 400 mV diff (800 mV p-p diff),

setting the TX_HEADROOM bit to 1 allows the transmitter an

extra 200 mV of output compliance range. When the TX_

HEADROOM bit is enabled, a core supply voltage, VCC ≥ 2.5 V,

is required. Enabling TX_HEADROOM increases the core

supply current. TX_HEADROOM can be enabled on a per-port

basis through Bits[6:4] in Register 0x05. A value of 0 disables the

headroom-generating circuitry; a value of 1 enables it.

Example 1: 1.8 V, PE Disabled

Consider a typical application using pin control mode. In this

case, the default output level of 400 mV diff (800 mV p-p diff)

is selected, and the user can choose preemphasis settings of

AD8155

0 dB or 6 dB. Table 19 shows that with preemphasis disabled,

a dc-coupled transmitter causes a 200 mV common-mode shift

across the termination resistors, whereas an ac-coupled transmitter

causes twice the common-mode shift. Notice that with VCC and

VTTO powered from a 1.8 V supply, the single-ended output voltage

swings between 1.8 V and 1.4 V when dc-coupled and between

1.6 V and 1.2 V when ac-coupled. In both cases, these levels are

greater than the minimum VL limit of 725 mV, and VCC satisfies

the minimum VCC limit of 1.8 V with the TX_HEADROOM bit

set to 0. Note that setting TX_HEADROOM = 1 violates the

minimum VCC limit of 2.5 V.

Example 2: 1.8 V, PE = 6 dB

With a PE setting of 6.02 dB, the ac-coupled transmitter has

single-ended swings from 1.4 V to 0.6 V, whereas the dc-

coupled transmitter outputs swing between 1.8 V and 1 V. The

peak minimum single-ended swing (VL-PE) of the ac-coupled

transmitter, in this case, exceeds the minimum VL limit of

725 mV by 125 mV. While theoretically in violation of the

specification, in practice, this setting is viable, especially at high

data rates. The transmitter theoretical peak voltage is rarely

achieved in practice because the high frequency characteristic

of the preemphasis is attenuated at the output pins by the low-

pass nature of the PC board environment and the channel. For

6.5 Gbps PE (SEL4G = 0), a 30% reduction of overshoot as

measured at the PC board is possible. For an output level of

400 mV diff and a PE setting of 6 dB, the user can calculate a

maximum overshoot of 400 mV diff but can measure only a

270 mV overshoot. With the preemphasis configured for

4.25 Gbps operation (SEL4G = 1), the measured overshoot

more closely matches the theoretical maximum. In this case, the

peak minimum voltage limit should be more closely observed.

Rev. 0 | Page 27 of 36

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