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AD74111 查看數據表(PDF) - Analog Devices

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AD74111 Datasheet PDF : 20 Pages
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DFS
DIN DAC
DOUT ADC
1/fS
16 DCLKs
AD74111
DAC
ADC
Figure 24. Multiframe Sync 16-Bit Data Mode
CRD:9
MFS
1
1
1
1
Table III. Multiframe Sync Selection
CRD:3
DM/MM
0
0
1
1
CRC:2
DSP Mode
0
1
0
1
Operating Mode
16-Bit Data Mode
32-Bit Data Mode
16-Bit Mixed Mode
32-Bit Mixed Mode
Figure
24
22
23
21
Table IV. Control Register Map
Address (Binary) Name Description
0000
0001
0010
0011
0100
0101
0110
CRA
CRB
CRC
CRD
CRE
CRF
CRG
Control Register A
Control Register B
Control Register C
Control Register D
Control Register E
Control Register F
Control Register G
*09h if DIN is low and 08h if DIN is high.
Type
R/W
R/W
R/W
R/W
R/W
R
R/W
Width
10
10
10
10
10
10
10
Reset Setting
00h
00h
00h
08h or 09h*
00h
00h
00h
Table V. Control Word Descriptions
Bit
15
14–11
10
9–0
Field
R/W
Register Address
Reserved
Data Field
Description
When this bit is high, the contents of the data field will be written to the register specified by the Address
Field. When this bit is low, a read of the register specified by the Address Field will occur at the next
sample interval; the contents of the Data Field are ignored.
This 4-bit field is used to select one of the seven control registers of the AD74111.
This bit is reserved and should always be programmed with zero.
This 10-bit field holds the data that is to be written to or read from the register specified in the Address Field.
REV. 0
–15–

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