VS1003 查看數據表（PDF） - Unspecified
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VS1003 Datasheet PDF : 61 Pages
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VS1003
5 PACKAGES AND PIN DESCRIPTIONS
5.2 LQFP-48 and BGA-49 Pin Descriptions
Pin Name
LQFP-
48
Pin
MICP
1
MICN
2
XRESET
3
DGND0
4
CVDD0
5
IOVDD0
6
CVDD1
7
DREQ
8
GPIO2 / DCLK1 9
GPIO3 / SDATA1 10
XDCS / BSYNC1 13
IOVDD1
14
VCO
15
DGND1
16
XTALO
17
XTALI
18
IOVDD2
19
IOVDD3
DGND2
20
DGND3
21
DGND4
22
XCS
23
CVDD2
24
RX
26
TX
27
SCLK
28
SI
29
SO
30
CVDD3
31
TEST
32
GPIO0 / SPIBOOT 33
BGA49 Pin
Ball Type
C3
AI
C2
AI
B1
DI
D2
DGND
C1
CPWR
D3
IOPWR
D1
CPWR
E2
DO
E1
DIO
F2
DIO
E3
DI
F3
IOPWR
G2
DO
F4
DGND
G3
AO
E4
AI
G4
IOPWR
F5
IOPWR
DGND
G5
DGND
F6
DGND
G6
DI
G7
CPWR
E6
DI
F7
DO
D6
DI
E7
DI
D5
DO3
D7
CPWR
C6
DI
C7
DIO
GPIO1
AGND0
AVDD0
RIGHT
AGND1
AGND2
GBUF
AVDD1
RCAP
AVDD2
LEFT
AGND3
LINEIN
34
B6
DIO
37
C5
APWR
38
B5
APWR
39
A6
AO
40
B4
APWR
41
A5
APWR
42
C4
AO
43
A4
APWR
44
B3
AIO
45
A3
APWR
46
B2
AO
47
A2
APWR
48
A1
AI
Function
Positive differential microphone input, self-biasing
Negative differential microphone input, self-biasing
Active low asynchronous reset
Core & I/O ground
Core power supply
I/O power supply
Core power supply
Data request, input bus
General purpose IO 2 / serial input data bus clock
General purpose IO 3 / serial data input
Data chip select / byte sync
I/O power supply
For testing only (Clock VCO output)
Core & I/O ground
Crystal output
Crystal input
I/O power supply
I/O power supply
Core & I/O ground
Core & I/O ground
Core & I/O ground
Chip select input (active low)
Core power supply
UART receive, connect to IOVDD if not used
UART transmit
Clock for serial bus
Serial input
Serial output
Core power supply
Reserved for test, connect to IOVDD
General purpose IO 0 / SPIBOOT, use 100 kΩ pull-
down resistor2
General purpose IO 1
Analog ground, low-noise reference
Analog power supply
Right channel output
Analog ground
Analog ground
Common buffer for headphones
Analog power supply
Filtering capacitance for reference
Analog power supply
Left channel output
Analog ground
Line input
1 First pin function is active in New Mode, latter in Compatibility Mode.
2 Unless pull-down resistor is used, SPI Boot is tried. See Chapter 9.5 for details.
Version: 1.09, 2018-03-16
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