21143 查看數據表（PDF） - Intel

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21143

PCI/CardBus 10/100 Ethernet LAN Controller

Intel 

21143

1.1

• Supports full-duplex operation on both MII/SYM and 10BASE-T ports.

• Provides internal and external loopback capability on all network ports.

• Supports IEEE 802.3 and ANSI 8802-3 Ethernet standards.

Other Features:

• Provides MicroWire* interface for serial ROM (1K and 4K EEPROM).

• Provides LED indications for various network activity.

• Implements test-access port (JTAG-compatible) with boundary-scan pins.

• Contains a 4-bit, general-purpose programmable register and corresponding

I/O pins with the ability to generate interrupts from two general-purpose pins.

General Description

The 21143 is an Ethernet LAN controller for both 100-Mb/s and 10-Mb/s data rates, which

provides a direct interface to the peripheral component interconnect (PCI) local bus or the

CardBus. The 21143 interfaces to the host processor by using onchip command and status registers

(CSRs) and a shared host memory area, set up mainly during initialization. This minimizes

processor involvement in the 21143 operation during normal reception and transmission.

The 21143 is optimized for low power PCI/CardBus based systems and supports two types of

power-management mechanisms. The main mechanism is based upon the OnNow architecture,

which is required for PC 97 and PC 98. The alternative mechanism is based upon the older remote

wake-up-LAN mechanism.

Large FIFOs allow the 21143 to efficiently operate in systems with longer latency periods. Bus

traffic is also minimized by filtering out received runt frames and by automatically retransmitting

collided frames without a repeated fetch from the host memory.

The 21143 provides three network ports: a 10BASE-T 10-Mb/s port, an attachment unit interface

(AUI) 10-Mb/s port, and a media-independent/symbol interface (MII/SYM) 10/100-Mb/s port. The

10BASE-T port provides a direct Ethernet connection to the twisted-pair (TP) interface. The AUI

port provides a direct Ethernet connection to the AUI.

The MII/SYM port supports two operational modes:

• MII mode—A full implementation of the MII standard

• SYM mode—Symbol interface to an external 100-Mb/s front-end decoder (ENDEC). In this

mode the 21143 uses an onchip physical coding sublayer (PCS) and a scrambler/descrambler

circuit to enable a low-cost 100BASE-T implementation.

The 21143 is capable of functioning in a full-duplex environment for the MII/SYM and 10BASE-T

ports. The 21143 provides an upgradable boot ROM interface.

2

Preliminary Datasheet

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