PE9601 查看數據表（PDF） - Peregrine Semiconductor
零件编号
产品描述 (功能)
比赛名单
PE9601 Datasheet PDF : 15 Pages
| |||
PE9601
Product Specification
Table 6. AC Characteristics
VDD = 3.0 V, -40° C < TA < 85° C, unless otherwise specified
Symbol
Parameter
Test Program Name
Conditions
Min
Control Interface and Latches (see Figures 4, 5, 6)
fClk
Serial data clock frequency
(Note 1)
tClkH
Serial clock HIGH time
t_clkH (s)
30
tClkL
Serial clock LOW time
t_clkL (s)
30
tDSU
Sdata set-up time after Sclk rising t_dsu_”xxx” (s) where “xxx”
10
edge, D[7:0] set-up time to
is name of pin being tested
M1_WR, M2_WR, A_WR, E_WR
rising edge
tDHLD
Sdata hold time after Sclk rising
t_dhid_”xxx” (s) where
10
edge, D[7:0] hold time to M1_WR, “xxx” is name of pin being
M2_WR, A_WR rising edge
tested
tPW
S_WR, M1_WR, M2_WR, A_WR, t_pw_”xxx” (s) where “xxx”
30
E_WR pulse width
is name of pin being tested
tCWR
Sclk rising edge to S_WR rising
t_cwr_”xxx” (s) where “xxx”
30
edge. S_WR, M1_WR, M2_WR,
is name of pin being tested
A_WR falling edge to Hop_WR
rising edge
tCE
Sclk falling edge to E_WR transition t_ce (s)
30
tWRC
S_WR falling edge to Sclk rising
t_wrc_”xxx” (s) where “xxx”
30
edge. Hop_WR falling edge to
is name of pin being tested
S_WR, M1_WR, M2_WR, A_WR
rising edge
tEC
E_WR transition to Sclk rising edge t_ec (s)
30
Main Divider (Including Prescaler)
Fin
Operating frequency
RF_sens
200
PFin
Input level range
RF_sens
External AC coupling
0
Main Divider (Prescaler Bypassed)
Fin
Operating frequency
20
PFin
Input level range
External AC coupling
-5
Reference Divider
fr
Operating frequency
Fc_sens
(Note 3)
Pfr
Reference input power (Note 2)
Fc_sens
Single ended input
-2
Phase Detector
fc
Comparison frequency
(Note 3)
Max
10
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
2200
5
220
5
100
20
ns
MHz
dBm
MHz
dBm
MHz
dBm
MHz
Note 1: Fclk is verified during the functional pattern test. Serial programming sections of the functional pattern are clocked at 10 MHz to verify Fclk
specification.
Note 2: CMOS logic levels can be used to drive reference input if DC coupled. Voltage input needs to be a minimum of 0.5Vp-p.
Note 3: Parameter is guaranteed through characterization only and is not tested.
PEREGRINE SEMICONDUCTOR CORP. | http://www.peregrine-semi.com
Copyright Peregrine Semiconductor Corp. 2001
Page 7 of 15
Share Link: 