4053G(2009) 查看數據表（PDF） - Unisonic Technologies

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4053G
(Rev.:2009)

TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS

Unisonic Technologies 

4053

CMOS IC

„ DYNAMIC ELECTRICAL CHARACTERISTICS

(CL = 50pF, Ta=25°C, VEE≦VSS, unless otherwise specified)

PARAMETER

SYMBOL VDD–VEE

Vdc

TEST CONDITIONS

MIN TYP MAX UNIT

Propagation Delay Times

Switch Input to Switch

Output (RL = 10 kΩ)

tPLH, tPHL

5 tPLH, tPHL =(0.17 ns/pF)CL + 16.5ns

10 tPLH, tPHL =(0.08 ns/pF)CL + 4.0ns

15 tPLH, tPHL =(0.06 ns/pF)CL + 3.0ns

25 65 ns

8.0 20 ns

6.0 15 ns

Inhibit to Output

tPHZ, tPLZ

tPZH, tPZL

5 (RL=10kΩ, VEE=VSS)

10 Output “1” or “0” to High Impedance,

15 or High Impedance to “1” or “0” Level

275 550 ns

140 280 ns

110 220 ns

5

300 600 ns

Control Input to Output

tPLH, tPHL

10 RL = 10 kΩ, VEE = VSS

15

120 240 ns

80 160 ns

Total Harmonic Distortion THD

10 RL = 10KΩ, f = 1 kHz, Vin = 5 VPP

0.07

%

Bandwidth

BW

10 RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p,

17

CL = 50pF, 20 Log (Vout/Vin) = -3dB)

MHz

Off Channel Feedthrough

Attenuation

10 RL=1KΩ, VIN = 1/2 (VDD–VEE) p–p

fIN = 55MHz

-50

dB

Channel Separation

10 RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p

fIN = 3MHz

-50

dB

Crosstalk, Control Input to

Common O/I

10 R1 = 1kΩ, RL = 10kΩ Control

tTLH = tTHL = 20ns, Inhibit = VSS

75

mV

Note 1. Data of “TYP” is intended as an indication of the IC’s potential performance.

2. For voltage drops across the switch(ΔVsw)>600mV (>300mV at high temperature), excessive VDD current

may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The

reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

UNISONIC TECHNOLOGIES CO., LTD

www.unisonic.com.tw

4 of 6

QW-R502-036.C

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