5962R9582401QQC 查看數據表（PDF） - Intersil

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5962R9582401QQC

Radiation Hardened 8-Bit CMOS Microprocessor

Intersil 

HS-80C85RH

TABLE 4. INSTRUCTION SET SUMMARY

MNE-

INSTRUCTION CODE

MONIC D7 D6 D5 D4 D3 D2 D1 D0

MOVE, LOAD, AND STORE

OPERATIONS

DESCRIPTION

MOVr1, 0 1 D D D S S S Move register to

r2

register

MOV M.r 0 1 1 1 0 S S S Move register to

memory

MOV r.M 0 1 D D D 1 1 0 Move memory to

register

MVl r

0 0 D D D 1 1 0 Move immediate

register

MVl M

0 0 1 1 0 1 1 0 Move immediate

memory

LXl B

0 0 0 0 0 0 0 1 Load immediate

register Pair B & C

LXl D

0 0 0 1 0 0 0 1 Load immediate

register Pair D & E

LXl H

0 0 1 0 0 0 0 1 Load immediate

register Pair H & L

STAX B 0 0 0 0 0 0 1 0 Store A indirect

STAX D 0 0 0 1 0 0 1 0 Store A indirect

LDAX B 0 0 0 0 1 0 1 0 Load A indirect

LDAX D 0 0 0 1 1 0 1 0 Load A indirect

STA

0 0 1 1 0 0 1 0 Store A direct

LDA

0 0 1 1 1 0 1 0 Load A direct

SHLD 0 0 1 0 0 0 1 0 Store H & L direct

LHLD 0 0 1 0 1 0 1 0 Load H & L direct

XCHG

1 1 1 0 1 0 1 1 Exchange D & E,

H & L Registers

STACK OPS

PUSH B 1 1 0 0 0 1 0 1 Push register Pair

B & C on stack

PUSH D 1 1 0 1 0 1 0 1 Push register Pair

D & E on stack

PUSH H 1 1 1 0 0 1 0 1 Push register Pair

H & L on stack

PUSH

PSW

1 1 1 1 0 1 0 1 Push A and Flags

on stack

CZ

1 1 0 0 1 1 0 0 Call on zero

CNZ

1 1 0 0 0 1 0 0 Call on no zero

CP

1 1 1 1 0 1 0 0 Call on positive

CM

1 1 1 1 1 1 0 0 Call on minus

CPE

1 1 1 0 1 1 0 0 Call on parity even

CPO

1 1 1 0 0 1 0 0 Call on parity odd

RETURN

RET

1 1 0 0 1 0 0 1 Return

RC

1 1 0 1 1 0 0 0 Return on carry

RNC

1 1 0 1 0 0 0 0 Return on no carry

RZ

1 1 0 0 1 0 0 0 Return on zero

TABLE 4. INSTRUCTION SET SUMMARY (Continued)

MNE-

INSTRUCTION CODE

MONIC D7 D6 D5 D4 D3 D2 D1 D0

OPERATIONS

DESCRIPTION

RNZ

1 1 0 0 0 0 0 0 Return on no zero

RP

1 1 1 1 0 0 0 0 Return on positive

RM

1 1 1 1 1 0 0 0 Return on minus

RPE

1 1 1 0 1 0 0 0 Return on parity

even

RPO

1 1 1 0 0 0 0 0 Return on parity

odd

RESTART

RST

1 1 A A A 1 1 1 Restart

INPUT/OUTPUT

IN

1 1 0 1 1 0 1 1 Input

OUT

1 1 0 1 0 0 1 1 Output

INCREMENT AND DECREMENT

INR r

0 0 D D D 1 0 0 Increment register

DCR r 0 0 D D D 1 0 1 Decrement register

INR M 0 0 1 1 0 1 0 0 Increment memory

DCR M 0 0 1 1 0 1 0 1 Decrement

memory

INX B

0 0 0 0 0 0 1 1 Increment B & C

registers

INX D

0 0 0 1 0 0 1 1 Increment D & E

registers

POP B

1 1 0 0 0 0 0 1 Pop register Pair

B & C off stack

POP D 1 1 0 1 0 0 0 1 Pop register Pair

D & E off stack

POP H 1 1 1 0 0 0 0 1 Popregister Pair

H & L off stack

POP

PSW

1 1 1 1 0 0 0 1 Pop A and Flags

off stack

XTHL

1 1 1 0 0 0 1 1 Exchange top ot

stack, H & L

SPHL

1 1 1 1 1 0 0 1 H & L to stack

pointer

LXI SP 0 0 1 1 0 0 0 1 Load immediate

stack pointer

INX SP 0 0 1 1 0 0 1 1 Increment stack

pointer

DCX SP 0 0 1 1 1 0 1 1 Decrement stack

pointer

JUMP

JMP

1 1 0 0 0 0 1 1 Jump

unconditional

JC

1 1 0 1 1 0 1 0 Jump on carry

JNC

1 1 0 1 0 0 1 0 Jump on no carry

JZ

1 1 0 0 1 0 1 0 Jump on zero

JNZ

1 1 0 0 0 0 1 0 Jump on no zero

JP

1 1 1 1 0 0 1 0 Jump on positive

8

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