74ABT244CPCX 查看數據表（PDF） - Fairchild Semiconductor
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74ABT244CPCX Datasheet PDF : 11 Pages
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Skew
TA 40qC to 85qC
TA 40qC to 85qC
VCC 4.5V–5.5V
VCC 4.5V–5.5V
Symbol
Parameter
CL 50 pF
8 Outputs Switching
CL 250 pF
8 Outputs Switching
Units
(Note 15)
(Note 16)
Max
Max
tOSHL
(Note 13)
Pin to Pin Skew
HL Transitions
0.8
1.8
ns
tOSLH
(Note 13)
Pin to Pin Skew
LH Transitions
0.8
1.8
ns
tPS
(Note 17)
Duty Cycle
LH–HL Skew
1.0
2.5
ns
tOST
(Note 13)
Pin to Pin Skew
LH/HL Transitions
1.0
2.5
ns
tPV
(Note 14)
Device to Device Skew
LH/HL Transitions
1.5
3.0
ns
Note 13: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (tOSHL), LOW-to-HIGH (tOSLH), or any combination switching LOW-to-HIGH and/or
HIGH-to-LOW (tOST). The specification is guaranteed but not tested.
Note 14: Propagation delay variation for a given set of conditions (i.e., temperature and VCC) from device to device. This specification is guaranteed but not
tested.
Note 15: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
Note 16: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 17: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Capacitance
Symbol
Parameter
Typ
CIN
Input Capacitance
5.0
COUT (Note 18) Output Capacitance
9.0
Note 18: COUT is measured at frequency f 1 MHz, per MIL-STD-883, Method 3012.
Units
pF
pF
VCC 0V
VCC 5.0V
Conditions
TA 25qC
5
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