74AC240 查看數據表（PDF） - Fairchild Semiconductor
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74AC240 Datasheet PDF : 11 Pages
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Connection Diagram
OE1 1
I0 2
O4 3
I1 4
O5 5
I2 6
O6 7
I3 8
O7 9
GND 10
20 VCC
19 OE2
18 O0
17 I4
16 O1
15 I5
14 O2
13 I6
12 O3
11 I7
Pin Description
Pin Names
OE1, OE2
I0–I7
O0–O7
Description
3-STATE Output Enable Inputs
Inputs
Outputs
Logic Symbol
IEEE/IEC
OE1 EN
I0
O0
I1
O1
I2
O2
I3
O3
OE2 EN
I4
O4
I5
O5
I6
O6
I7
O7
Truth Tables
Inputs
OE1
In
L
L
L
H
H
X
Outputs
(Pins 12, 14, 16, 18)
H
L
Z
Inputs
OE2
In
L
L
L
H
H
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Outputs
(Pins 3, 5, 7, 9)
H
L
Z
©2006 Fairchild Semiconductor Corporation
74AC240, 74ACT240 Rev. 1.2.0
2
www.fairchildsemi.com
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