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74ALVC86M(2001) 查看數據表(PDF) - Fairchild Semiconductor

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74ALVC86M Datasheet PDF : 5 Pages
1 2 3 4 5
December 2001
Revised December 2001
74ALVC86
Low Voltage Quad 2-Input Exclusive-OR Gate with
3.6V Tolerant Inputs and Outputs
General Description
The ALVC86 contains four 2-input exclusive OR gates.
This product is designed for low voltage (1.65V to 3.6V)
VCC applications with I/O compatibility up to 3.6V
The 74ALVC86 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD
3.5 ns max for 3.0V to 3.6V VCC
4.4 ns max for 2.3V to 2.7V VCC
7.8 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Uses patented Quiet Seriesnoise/EMI reduction
circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Order Number Package Number
Package Description
74ALVC86M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ALVC86MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
An, Bn
On
Description
Inputs
Outputs
Quiet Seriesis a trademark of Fairchild Semiconductor Corporation
© 2001 Fairchild Semiconductor Corporation ds500718
www.fairchildsemi.com

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