74HC1G86GW.125 查看數據表（PDF） - NXP Semiconductors.

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74HC1G86GW.125

2-input EXCLUSIVE-OR gate

NXP Semiconductors. 

Nexperia

12. Waveforms

74HC1G86; 74HCT1G86

2-input EXCLUSIVE-OR gate

A, B input

Y output

VM

tPHL

VM

For 74HC1G86: VM = 0.5 × VCC; VI = GND to VCC.

For 74HCT1G86: VM = 1.3 V; VI = GND to 3.0 V.

Fig 5. The input (A and B) to output (Y) propagation delays

tPLH

mna041

PULSE

VI

GENERATOR

VCC

VO

DUT

RT

CL

50 pF

mna034

Test data is given in Table 8. Definitions for test circuit:

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

Fig 6. Load circuitry for switching times

74HC_HCT1G86_4

Product data sheet

Rev. 04 — 20 July 2007

© Nexperia B.V. 2017. All rights reserved

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