74HC574 查看數據表（PDF） - ON Semiconductor
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74HC574 Datasheet PDF : 8 Pages
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OUTPUT 1
ENABLE
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 CLOCK
Figure 1. Pin Assignment
74HC574
FUNCTION TABLE
Inputs
OE Clock D
Output
Q
L
L
L
L,H,
H
X
H
H
L
L
X No Change
X
Z
X = Don’t Care
Z = High Impedance
DATA
INPUTS
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
CLOCK 11
OUTPUT ENABLE 1
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
NONINVERTING
OUTPUTS
PIN 20 = VCC
PIN 10 = GND
Figure 2. Logic Diagram
Design Criteria
Internal Gate Count*
Value
66.5
Units
ea.
Internal Gate Propagation Delay
1.5
ns
Internal Gate Power Dissipation
5.0
mW
Speed Power Product
0.0075 pJ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ *Equivalent to a two−input NAND gate.
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