74HC7597 查看數據表（PDF） - Philips Electronics

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74HC7597

8-bit shift register with input latches

Philips Electronics 

Philips Semiconductors

8-bit shift register with input latches

Product specification

74HC/HCT7597

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.11 Waveforms showing the D7 input to Q

output propagation delays and output

transition times.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.12 Waveforms showing the MR input to PL,

SHCP removal times.

The shaded areas indicate when the input is permitted to

change for predictable output performance.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.13 Waveforms showing hold and set-up times

for DS, Dn inputs to SHCP, LE inputs.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.14 Waveforms showing set-up and hold times

for PL input to SHCP input.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

December 1990

12

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