74HC3G14(2013) 查看數據表（PDF） - NXP Semiconductors.
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74HC3G14 Datasheet PDF : 21 Pages
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Nexperia
74HC3G14; 74HCT3G14
Triple inverting Schmitt trigger
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 11.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 11. Test circuit for measuring switching times
Table 11. Test data
Type
Input
74HC3G14
74HCT3G14
VI
GND to VCC
GND to 3.0 V
tr, tf
6 ns
6 ns
Load
CL
50 pF
50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
74HC_HCT3G14
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 9 December 2013
© Nexperia B.V. 2017. All rights reserved
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