datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

74VHCT86AM_99 查看數據表(PDF) - STMicroelectronics

零件编号
产品描述 (功能)
比赛名单
74VHCT86AM_99
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74VHCT86AM_99 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
®
74VHCT86A
QUAD EXCLUSIVE OR GATE
s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.8V (Max.)
DESCRIPTION
The 74VHCT86A is an advanced high-speed
CMOS QUAD EXCLUSIVE OR GATE fabricated
with sub-micron silicon gate and double-layer
PRELIMINARY DATA
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT86AM
74VHCT86AT
metal wiring C2MOS technology.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
1/8

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]