82C85 查看數據表（PDF） - Intersil

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82C85

CMOS Static Clock Controller/Generator

Intersil 

Timing Waveforms

EFI I

OSC 0

(1)

TEHEL

(3)

TELEL

TELEH

(2)

82C85

CLK 0

CLK50 0

PCLK 0

CSYNC I

(15)

TEHYL

(16)

TYHYL

(14)

TYLEH

(27)

(43)

TCLCH

(26)

TCHCL

TCLCL (25)

TCLC50L

(28)

T5CHCL

(37)

TCLPH

T5CLCH (29)

TCLPL

(38)

TPHPL

(32)

TPLPH

(33)

CLK AND CLK50

1.0V

(30) TCH1CH2

3.5V

TCL2CL1 (31)

FIGURE 7. WAVEFORMS FOR CLOCKS

NOTE: All Timing Measurements are made at 1.5V, Unless Otherwise Noted.

CLK

RDY1.2

AEN1.2

ASYNC

READY

(9)

TCLR1X

(7) TRIVCH

(12) TA1VR1V

(10)

TAYVCL

(13) TCLA1X

(8) TRILCL

(9)

TCLR1X

(11) TCLAYX

(35)

TRYHCH

(34) TRYLCL

FIGURE 8. WAVEFORMS FOR READY SIGNALS (FOR ASYNCHRONOUS DEVICES)

309

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