AD5061 查看數據表（PDF） - Analog Devices

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AD5061

Fully Accurate 16-Bit VOUT nanoDAC™ SPI Interface 2.7 V to 5.5 V, in an SOT-23

Analog Devices 

0.10

VDD = 5.5V, VREF = 4.096V

0.08 VDD = 2.7V, VREF = 2.0V

0.06

0.04

GAIN ERROR @ VDD = 2.7V

0.02

0

–0.02

GAIN ERROR @ VDD = 5.5V

–0.04

–0.06

–0.08

–0.10

–40 –20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

Figure 22. Gain Error vs. Temperature

16

14

12

10

8

6

4

2

0

0.83 0.84 0.85 0.86 0.87 0.88 0.89 0.90 0.91 MORE

BIN

Figure 23. IDD Histogram @ VDD = 3 V

14

12

10

8

6

4

2

0

1.00 1.01 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 1.11 MORE

BIN

Figure 24. IDD Histogram @ VDD = 5 V

AD5061

CH1 = VDD

CH2 = VOUT

VDD = 5V VREF = 4.096VDD

RAMP RATE = 200µs

TA = 25°C

CH1 2V/DIV CH2 1V/DIV TIME BASE = 100µs

Figure 25. Hardware Power-Down Glitch

CH1 = SCLK

CH2 = SYNC

CH3 = VOUT

VDD = 5V VREF = 4.096VDD

TA = 25°C

CH4 = TRIGGER

CH1 2V/DIV CH2 2V/DIV CH3 20mV/DIV CH4 2V/DIV

TIME BASE 1µs/DIV

Figure 26. Exiting Software Power-Down Glitch

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5

REFERENCE VOLTAGE (V)

Figure 27. VDD Headroom vs. Reference Voltage.

Rev. A | Page 11 of 20

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