AD711CQ 查看數據表（PDF） - Analog Devices

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AD711CQ

Precision, Low Cost, High Speed, BiFET Op Amp

Analog Devices 

AD711

Figure 28a. Settling Characteristics 0 to +10 V Step

Upper Trace: Output of AD711 Under Test (5 V/Div)

Lower Trace: Amplified Error Voltage (0.01%/Div)

Figure 28b. Settling Characteristics 0 to –10 V Step

Upper Trace: Output of AD711 Under Test (5 V/Div)

Lower Trace: Amplified Error Voltage (0.01%/Div)

Figure 29. Settling Time Test Circuit

GUARDING

The low input bias current (15 pA) and low noise characteristics

of the AD711 BiFET op amp make it suitable for electrometer

applications such as photo diode preamplifiers and picoampere

current-to-voltage converters. The use of a guarding technique

such as that shown in Figure 30, in printed circuit board layout

and construction is critical to minimize leakage currents. The

guard ring is connected to a low impedance potential at the

same level as the inputs. High impedance signal lines should not

be extended for any unnecessary length on the printed circuit

board.

D/A CONVERTER APPLICATIONS

The AD711 is an excellent output amplifier for CMOS DACs.

It can be used to perform both 2 quadrant and 4 quadrant op-

eration. The output impedance of a DAC using an inverted

R-2R ladder approaches R for codes containing many 1s, 3R for

codes containing a single 1, and for codes containing all zero,

the output impedance is infinite.

For example, the output resistance of the AD7545 will modu-

late between 11 kΩ and 33 kΩ. Therefore, with the DAC’s in-

ternal feedback resistance of 11 kΩ, the noise gain will vary from

2 to 4/3. This changing noise gain modulates the effect of the

input offset voltage of the amplifier, resulting in nonlinear DAC

amplifier performance.

The AD711K with guaranteed 500 µV offset voltage minimizes

this effect to achieve 12-bit performance.

Figures 31 and 32 show the AD711 and AD7545 (12-bit

CMOS DAC) configured for unipolar binary (2-quadrant multi-

plication) or bipolar (4-quadrant multiplication) operation. Ca-

pacitor C1 provides phase compensation to reduce overshoot

and ringing.

Figure 30. Board Layout for Guarding Inputs

REV. A

–9–

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