AD7641ASTRL 查看數據表（PDF） - Analog Devices
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AD7641ASTRL Datasheet PDF : 28 Pages
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AD7641
TRANSFER FUNCTIONS
Using the OB/2C digital input, except in 18-bit interface mode,
the AD7641 offers two output codings: straight binary and twos
complement. The LSB size with VREF = 2.048 V is 2 × VREF/
262,144, which is 15.623 μV. Refer to Figure 22 and Table 8 for
the ideal transfer characteristic.
111...111
111...110
111...101
Table 8. Output Codes and Ideal Input Voltages
Digital Output Code (Hex)
Description
Analog Input Straight Twos
VREF = 2.048 V Binary Complement
FSR −1 LSB
+2.0479844 V 0x3FFFF1 0x1FFFF1
FSR − 2 LSB
+2.0479688 V 0x3FFFE 0x1FFFE
Midscale + 1 LSB +15.625 μV
0x20001 0x00001
Midscale
0V
0x20000 0x00000
Midscale − 1 LSB −15.625 μV
0x1FFFF 0x3FFFF
−FSR + 1 LSB
−2.0479844 V 0x30001 0x20001
−FSR
−2.048 V
0x300002 0x200002
000...010
000...001
000...000
–FSR –FSR + 1 LSB
–FSR + 0.5 LSB
+FSR – 1 LSB
+FSR – 1.5 LSB
ANALOG INPUT
Figure 22. ADC Ideal Transfer Function
1 This is also the code for overrange analog input (VIN+ − VIN− above
+VREF − VREFGND).
2 This is also the code for underrange analog input (VIN+ − VIN− below
−VREF + VREFGND).
ANALOG
SUPPLY (2.5V)
10µF
100nF
NOTE 5
10Ω
DIGITAL
SUPPLY (2.5V)
10µF 100nF
100nF
10µF
DIGITAL
INTERFACE
SUPPLY
(2.5V OR 3.3V)
ANALOG
INPUT +
ANALOG
INPUT –
CREF
10µF
100nF
NOTE 4
NOTE 2
U1
15Ω
CC
2.7nF
NOTE 1
NOTE 2
U2
15Ω
CC
2.7nF
NOTE 1
AVDD AGND DGND
REF NOTE 3
REFBUFIN
REFGND
DVDD OVDD OGND
SCLK
SDOUT
BUSY
CNVST
IN+
AD7641
D0/OB/2C
MODE0
MODE1
WARP
NORMAL
CS
IN–
RD
NOTE 3
PD PDREF PDBUF
RESET
SERIAL
PORT
NOTE 7
50Ω
D
50pF
MICROCONVERTER/
MICROPROCESSOR/
DSP
OVDD
50pF
10kΩ
NOTE 6
CLOCK
1. SEE ANALOG INPUTS SECTION.
2. THE AD8021 IS RECOMMENDED. SEE DRIVER AMPLIFIER CHOICE SECTION.
3. THE CONFIGURATION SHOWN IS USING THE INTERNAL REFERENCE. SEE VOLTAGE REFERENCE INPUT SECTION.
4. A 10µF CERAMIC CAPACITOR (X5R, 1206 SIZE) IS RECOMMENDED (FOR EXAMPLE, PANASONIC ECJ3YB0J106M).
SEE VOLTAGE REFERENCE INPUT SECTION.
5. OPTION, SEE POWER SUPPLY SECTION.
6. OPTION, SEE POWER-UP SECTION.
7. OPTIONAL LOW JITTER CNVST, SEE CONVERSION CONTROL SECTION.
Figure 23. Typical Connection Diagram
Rev. 0 | Page 16 of 28
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