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AD8340(2004) 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
比赛名单
AD8340
(Rev.:2004)
ADI
Analog Devices ADI
AD8340 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
AD8340
EVALUATION BOARD
The evaluation board circuit schematic for the AD8340 is
shown in Figure 39.
The evaluation board is configured to be driven from a
single-ended 50 Ω source. Although the input of the AD8340 is
differential, it may be driven single-ended, with no loss of
performance.
The low-pass corner frequency of the baseband I and Q chan-
nels can be reduced by installing capacitors in the C11 and C12
positions. The low-pass corner frequency for either channel is
approximated by
45 kHz × 10 nF
f3dB Cexternal + 0.5 pF
On this evaluation board, the I and Q baseband circuits are
identical to each other, so the following description applies
equally to each. The connections and circuit configuration for
the Q baseband inputs are described in Table 4.
The baseband input of the AD8340 requires a differential volt-
age drive. The evaluation board is set up to allow such a drive by
connecting the differential voltage source to QBBP and QBBM.
The common-mode voltage should be maintained at approxi-
mately 0.5 V. For this configuration, Jumpers W1 to W4 should
be removed.
The baseband input of the evaluation board may also be driven
with a single-ended voltage. In this case, a bias level is provided
to the unused input from Potentiometer R10 by installing either
W1 or W2.
Setting SW1 in Position B disables the AD8340 output amplifier.
With SW1 set to Position A, the output amplifier is enabled.
With SW1 set to Position A, an external voltage signal, such as a
pulse, can be applied to the DSOP SMA connector to exercise
the output amplifier enable/disable function.
Rev. 0 | Page 16 of 20

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