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AD9552(RevC) 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
比赛名单
AD9552
(Rev.:RevC)
ADI
Analog Devices ADI
AD9552 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9552
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Y4 1
Y5 2
A0 3
A1 4
A2 5
RESET 6
VDD 7
LDO 8
PIN 1
INDICATOR
AD9552
TOP VIEW
(Not to Scale)
24 GND
23 OUT2
22 OUT2
21 VDD
20 LOCKED
19 LDO
18 VDD
17 LDO
NOTES
1. EXPOSED DIE PAD MUST BE
CONNECTED TO GND.
Figure 2. Pin Configuration
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Type1
29, 30, 31,
32, 1, 2
Y0, Y1, Y2, Y3, Y4, I
Y5
3, 4, 5
A0, A1, A2
I
6
RESET
I
7, 18, 21, 28 VDD
P
8, 17, 19
LDO
P/O
9, 10
XTAL
I
11
REF
I
12
CS
I
13
SCLK
I
14
SDIO
I/O
15
OUTSEL
I
16
20
26, 22
27, 23
24, 25
EP
FILTER
I/O
LOCKED
O
OUT1, OUT2
O
OUT1, OUT2
O
GND
P
Exposed Die Pad
Description
Control Pins. These pins select preset values for the PLL feedback divider and the OUT1
dividers based on the input reference frequency selected via the A[0:2] pins and have
internal 100 kΩ pull-up resistors.
Control Pins. These pins select the input reference frequency and have internal 100 kΩ pull-
up resistors.
Digital Input, Active High. Resets internal logic to default states. This pin has an internal
100 kΩ pull-up resistor, so the default state of the device is reset.
Power Supply Connection: 3.3 V Analog Supply.
LDO Decoupling Pins. Connect a 0.47 μF decoupling capacitor from each of these pins to
ground.
Crystal Resonator Input. Connect a crystal resonator across these pins.
Reference Clock Input. Connect this pin to an active clock input signal, or connect it to VDD
when using a crystal resonator across the XTAL pins.
Digital Input, Active Low, Chip Select.
Serial Data Clock.
Digital Serial Data Input/Output.
Logic 0 selects LVDS and Logic 1 selects LVPECL-compatible levels for both OUT1 and OUT2
when the outputs are not under SPI port control. Can be overridden via the programming
registers. This pin has an internal 100 kΩ pull-up resistor.
Loop Filter Node for the PLL. Connect an external 12 nF capacitor from this pin to Pin 17 (LDO).
Active High Locked Status Indicator for the PLL.
Complementary Square Wave Clocking Outputs.
Square Wave Clocking Outputs.
Analog Ground.
The exposed die pad must be connected to GND.
1 I = input, I/O = input/output, O = output, P = power, P/O = power/output.
Rev. C | Page 8 of 32

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