AD9683 查看數據表（PDF） - Analog Devices

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AD9683

14-Bit, 170 MSPS/250 MSPS, JESD204B, Analog-to-Digital Converter

Analog Devices 

AD9683

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Product Highlights ........................................................................... 3

Specifications..................................................................................... 4

ADC DC Specifications ............................................................... 4

ADC AC Specifications ............................................................... 5

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 8

Timing Specifications .................................................................. 9

Absolute Maximum Ratings.......................................................... 10

Thermal Characteristics ............................................................ 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Typical Performance Characteristics ........................................... 13

Equivalent Circuits ......................................................................... 18

Theory of Operation ...................................................................... 19

ADC Architecture ...................................................................... 19

Analog Input Considerations.................................................... 19

Voltage Reference ....................................................................... 20

Clock Input Considerations ...................................................... 21

Power Dissipation and Standby Mode..................................... 23

REVISION HISTORY

4/13—Revision 0: Initial Version

Data Sheet

Digital Outputs ............................................................................... 24

JESD204B Transmit Top Level Description............................ 24

ADC Overrange and Gain Control.......................................... 29

DC Correction (DCC)................................................................... 31

DC Correction Bandwidth........................................................ 31

DC Correction Readback .......................................................... 31

DC Correction Freeze................................................................ 31

DC Correction Enable Bits ....................................................... 31

Serial Port Interface (SPI).............................................................. 32

Configuration Using the SPI..................................................... 32

Hardware Interface..................................................................... 32

SPI Accessible Features.............................................................. 33

Memory Map .................................................................................. 34

Reading the Memory Map Register Table............................... 34

Memory Map Register Table..................................................... 35

Memory Map Register Descriptions........................................ 38

Applications Information .............................................................. 43

Design Guidelines ...................................................................... 43

Outline Dimensions ....................................................................... 44

Ordering Guide .......................................................................... 44

Rev. 0 | Page 2 of 44

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