AIC1573 查看數據表（PDF） - Analog Intergrations

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AIC1573

5-bit DAC, Synchronous PWM Power Regulator with Simple PWM Power Regulator, LDO And Linear Controller

Analog Intergrations 

AIC1573

n PIN DESCRIPTIONS

Pin 1:

Pin 2:

UGATE2: External high-side N-MOSFET

gate drive pin. Connect UGATE2

to gate of the external high-side

N-MOSFET .

PHASE2:

Pin 7:

Pin 6:

Pin 5:

Pin 4:

Pin 3:

Pin 8:

Over-current detection pin. Con-

nect the PHASE2 pin to source

of the external high-side N-

MOSFET. This pin detects the

voltage drop across the high-side

N-MOSFET RDS(ON) for over-

current protection.

VID4:

VID3:

VID2:

VID1:

VID0: 5bit DAC voltage select pin. TTL-

compatible inputs used to set the

internal voltage reference VDAC.

When left open, these pins are

internally pulled up to 5V and

provide logic ones. The level of

VDAC sets the converter output

voltage as well as the PGOOD

and OVP thresholds.

Table 1 specifies the VDAC volt-

age for the 32 combinations of

DAC inputs.

PGOOD: Power good indicator pin.

PGOOD is an open drain output.

This pin is pulled low when the

converter output is ±10% out of

the VDAC reference voltage or

the other outputs are below their

under-voltage thresholds. The

PGOOD output is open for VID

codes that inhibit operation. See

Table 1.

Pin 9: OCSET2: Current limit sense pin. Connect

a resistor ROCSET from this pin to

the drain of the external high-side

N-MOSFET. ROCSET, an internal

200µA current source (IOCSET),

and the upper N-MOSFET on-

resistance (RDS(ON)) set the over-

current trip point according to the

following equation:

IPEAK = IOCSET × ROCSET

RDS(ON)

Pin 10: VSEN2: Connect this pin to the output of

the standard buck PWM regula-

tor. The voltage at this pin is

regulated to the 1.5V/3.3V prede-

termined by the logic Low/High

level status of the SELECT pin.

This pin is also monitored by the

PGOOD comparator circuit.

Pin 11: SELECT: This pin determines the output

voltage of the AGP bus switching

regulator. A low TTL input sets

the output voltage to 1.5V, while

a high input sets the output volt-

age to 3.3V.

Pin 12: SS:

Soft-start pin. Connect a capaci-

tor from this pin to ground. This

capacitor, along with an internal

25µA (typically) current source,

sets the soft-start interval of the

converter. Pulling this pin low will

shut down the IC.

Pin 13: FAULT/RT: Frequency adjustment pin.

Connecting a resistor (RT) from

this pin to GND, increasing the

frequency. Connecting a resistor

(RT) from this pin to VCC, de-

10

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