AIC1574 查看數據表（PDF） - Analog Intergrations

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AIC1574

5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers

Analog Intergrations 

AIC1574

n PIN DESCRIPTION

Pin 1: DRIVE2: Connect this pin to the Gate of

the external N-MOS to supply

AGP power.

Pin 2 :

FIX:

Left this pin open, its

voltage is pulled high, enabling

fixed output voltage operation for

1.5V and 1.8V linear regulators. If

connect this pin to Ground, the

new output voltage set by external

resistors RGND (Connected be-

tween VSEN and GND) and ROUT

(Connected between VSEN and

VOUT) .

VOUT = 1.265V × (RGND + ROUT )

RGND

Pin 7: VID4:

Pin 6: VID3:

Pin 5: VID2:

Pin 4: VID1:

Pin 3: VID0:

5bit DAC voltage select pin. TTL-

compatible inputs used to set the

internal voltage reference VDAC.

When left open, these pins are in-

ternally pulled up to 5V and

provide logic ones. The level of

VDAC sets the converter output

voltage as well as the PGOOD

and OVP thresholds.

Table 1 specifies the VDAC volt-

age for the 32 combinations of

DAC inputs.

Pin 8: PGOOD: Power good indicator pin.

PGOOD is an open drain output.

This pin is pulled low when the

converter output is ±10% out of

the VDAC reference voltage and

the other outputs are below their

under-voltage thresholds. The

PGOOD output is open for VID

codes that inhibit operation. See

Table 1.

Pin 9 :

SD:

A TTL-compatibe

logic level high signal applied

this pin immediately discharges

the soft-start capacitors, dis-

abling all the outputs. Dedicated

internal circuitry insures the core

output voltage does not go nec-

tive during this process. When

re-enabled, this IC undergoes a

new soft-start cycle. Left open,

this pin is pulled low by an inter-

nal pull-down resistor, enabling

operation.

Pin 10:VSEN2: Connect this pin to the output of

the AGP linear regulator. The

voltage at this pin is regulated to

the 1.5V/3.3V predetermined by

the logic Low/High level ststus of

the SELECT pin. This pin is also

monitored for under-voltage

events.

Pin 11:SELECT: This pin determines the output

voltage of the AGP bus linear

regulator. A low TTL input sets

the output voltage to 1.5V, while

a high input sets the output volt-

age to 3.3V.

10

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