ILX521A 查看數據表（PDF） - Sony Semiconductor
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ILX521A Datasheet PDF : 12 Pages
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φCLK Timing (For all modes)
φCLK
t1
90%
50%
10%
t3
t2
t4
Item
φCLK pulse rise/fall time
φCLK pulse Duty∗1
∗1 100 × t4/(t3 + t4)
Symbol
Min.
t1, t2
0
—
40
Typ.
10
50
Max.
100
60
ILX521A
Unit
ns
%
φROG, φCLK Timing
φROG
t6
90%
10%
t7
φCLK
90%
t5
t8
t9
Item
φROG, φCLK pulse timing 1
φROG, φCLK pulse timing 2
φROG pulse rise/fall time
φROG pulse period
Symbol
Min.
Typ.
Max.
Unit
t5
500
1000
—
ns
t9
500
1000
—
ns
t6, t8
0
10
—
ns
t7
500
1000
—
ns
–6–
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