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AK4589 查看數據表(PDF) - Asahi Kasei Microdevices

零件编号
产品描述 (功能)
比赛名单
AK4589
AKM
Asahi Kasei Microdevices AKM
AK4589 Datasheet PDF : 76 Pages
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ASAHI KASEI
[AK4589]
SWITCHING CHARACTERISTICS (ADC/DAC part)
(Ta=25°C; AVDD, DVDD, PVDD=4.755.25V; TVDD=2.75.25V; CL=20pF)
Parameter
Symbol
min
typ
Master Clock Timing
Master Clock
256fsn, 128fsd:
fCLK
8.192
Pulse Width Low
tCLKL
27
Pulse Width High
tCLKH
27
384fsn, 192fsd:
fCLK
12.288
Pulse Width Low
tCLKL
20
Pulse Width High
tCLKH
20
512fsn, 256fsd, 128fsq:
fCLK
16.384
Pulse Width Low
tCLKL
15
Pulse Width High
tCLKH
15
LRCK1 Timing (Slave Mode)
Normal mode
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Duty Cycle
TDM 256 mode
LRCK1 frequency
“H” time
“L” time
TDM 128 mode
LRCK1 frequency
“H” time
“L” time
LRCK1 Timing (Master Mode)
Normal mode
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Duty Cycle
TDM 256 mode
LRCK1 frequency
“H” time
TDM 128 mode
LRCK1 frequency
“H” time
Power-down & Reset Timing
PDN Pulse Width
PDN “” to SDTO1 valid
(Note 16)
(Note 16)
(Note 17)
(Note 18)
fsn
fsd
fsq
Duty
fsd
tLRH
tLRL
fsd
tLRH
tLRL
fsn
fsd
fsq
Duty
fsn
tLRH
fsd
tLRH
tPD
tPDV
32
64
120
45
32
1/256fs
1/256fs
64
1/128fs
1/128fs
32
64
120
32
64
150
50
1/8fs
1/4fs
522
Notes:
16. “L” time at I2S format.
17. The AK4589 can be reset by bringing PDN “L” to “H” upon power-up.
18. These cycles are the number of LRCK rising from PDN rising.
max
Units
12.288
18.432
24.576
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
48
kHz
96
kHz
192
kHz
55
%
48
kHz
ns
ns
96
kHz
ns
ns
48
kHz
96
kHz
192
kHz
%
48
kHz
ns
96
kHz
ns
ns
1/fs
MS0339-E-00
- 14 -
2004/09

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