AKD4368-B 查看數據表（PDF） - Asahi Kasei Microdevices

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AKD4368-B

AK4368 Evaluation Board Rev.2

Asahi Kasei Microdevices 

(3) EXT Slave Mode

AK4368

MCKO

MCKI

BICK

LRCK

SDATA

256fs, 512fs or 1024fs

DSP or μP

MCLK

≥ 32fs

BCLK

1fs

LRCK

SDTO

[AKD4368-B]

Figure 4. EXT Slave Mode

(3-1) In case of using DIR (Optical Link) <default>

PORT1 (DIR) is used. DIR generates MCLK, BICK, LRCK and SDATA from the received data through optical

connector (TORX141). Nothing should be connected to PORT2(DSP).

JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be shorted.

JP8(LRCK2) and JP9(BICK2) should also be short.

JP3

MCLK

JP4

BICK

JP5

LRCK

JP6

SDTO

JP8

LRCK2

JP9

BICK2

The AK4116 operates at fs of 32kHz or more. If the fs is slower than 32kHz, any other evaluation mode

without using DIR should be used.

(3-2) In case of connecting AK4368 with external DSP

PORT2 (DSP) is used. MCLK, BICK, LRCK and SDATA are supplied from PORT2. Nothing should be

connected to PORT1 (DIR).

JP3(MCLK),JP4(BICK),JP5(LRCK) and JP6(SDTO) should be open.

JP8(LRCK2) and JP9(BICK2) should be short.

JP3

MCLK

JP4

BICK

JP5

LRCK

JP6

SDTO

JP8

LRCK2

JP9

BICK2

Other jumper pins set up

JP1 (GND) : Analog ground and Digital ground

OPEN : Separated. <default>

SHORT : Common. (The connector “DGND” can be open.)

<KM081301>

-4-

2006/02

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