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HN58S256AT-20 查看數據表(PDF) - Hitachi -> Renesas Electronics

零件编号
产品描述 (功能)
比赛名单
HN58S256AT-20
Hitachi
Hitachi -> Renesas Electronics Hitachi
HN58S256AT-20 Datasheet PDF : 17 Pages
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HN58S256A Series
2. Data Protection at VCC On/Off
When VCC is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act
as a trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional
programming, the EEPROM must be kept in an unprogrammable state while the CPU is in an unstable
state.
Note: The EEPROM shoud be kept in unprogrammable state during VCC on/off by using CPU RESET
signal.
VCC
CPU
RESET
* Unprogrammable
* Unprogrammable
(1) Protection by CE, OE, WE
To realize the unprogrammable state, the input level of control pins must be held as shown in the table
below.
CE
VCC
×
×
OE
×
VSS
×
WE
×
×
VCC
×: Don’t care.
VCC: Pull-up to VCC level.
VSS: Pull-down to VSS level.

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