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PDM4M4060S25M 查看數據表(PDF) - Paradigm Technology

零件编号
产品描述 (功能)
比赛名单
PDM4M4060S25M
Paradigm-Technology
Paradigm Technology Paradigm-Technology
PDM4M4060S25M Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
PDM4M4060
AC Electrical Characteristics (Vcc = 5V ± 5%, TA = 0°C to +70°C)
PDM4M4060SXXZ, PDM4M4060SXXM
-10 ns(2)
-12 ns(2)
-15 ns(2)
-20 ns
-25 ns
Symbol Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
Read Cycle
tRC
Read Cycle Time
10 — 12 — 15 — 20 — 25 — ns
tAA
Address Access Time
— 10 — 12 — 15 — 20 — 25 ns
tACS
tCLZ(1)
Chip Select Access Time
Chip Select to Output in Low-Z
— 10 — 12 — 15 — 20 — 25 ns
2 — 2 — 2 — 5 — 5 — ns
tOE
tOLZ(1)
tCHZ(1)
tOHZ(1)
Output Enable to Output Valid
— 5 — 7 — 8 — 10 — 12 ns
Output Enable to Output in Low-Z
0 — 0 — 0 — 0 — 0 — ns
Chip Deselect to Output in High-Z — 6 — 7 — 8 — 10 — 12 ns
Output Disable to Output in High-Z — 6 — 7 — 8 — 10 — 10 ns
tOH
Output Hold from Address Change 3 — 3 — 3 — 3 — 3 — ns
Write Cycle
tWC
tCW
tAW
tAS
tWP
tWR
tWHZ(1)
tDW
tDH
tOW(1)
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Write Enable to Output in High-Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
10 — 12 — 15 — — 20 — 25 ns
8 — 10 — 12 —
ns
8 — 10 — 12 — 20 — 25 — ns
0
0
0
— 15 — 20 — ns
8 — 10 — 12 — 15 — 20 — ns
1
1
1
0
0
— ns
— 5 — 6 — 7 15 — 20 — ns
6 — 7 — 8 — 0 — 0 — ns
1 — 1 — 1 — — 13 — 15 ns
1 — 1 — 1 — 12 — 15 — ns
NOTES 1. This parameter is determined by device characteristics but is not production tested.
2. Preliminary specifications only.
8-60
Rev 2.2 - 7/17/97

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