AOZ1018 查看數據表（PDF） - Alpha and Omega Semiconductor
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AOZ1018 Datasheet PDF : 14 Pages
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AOZ1018
Figure 3. AOZ1018 PCB Layout
1. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal dissipation.
2. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise cou-
pling to the AGND pin. In this case, put small decou-
pling capacitor to stabilize the input voltage of IC.
4. Make the current trace from LX pin to L to Co to the
PGND as short as possible.
5. Pour copper plane on all unused board area and con-
nect it to stable DC nodes, like VIN, GND or VOUT.
6. The LX pin is connected to internal PFET drain. They
are low resistance thermal conduction path and most
noisy switching node. Connected a copper plane to
LX pin to help thermal dissipation. This copper plane
should not be too larger otherwise switching noise
may be coupled to other part of circuit.
7. Keep sensitive signal trace far away form the LX pin.
Rev. 1.0 November 2006
www.aosmd.com
Page 11 of 14
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