AOZ1019AI 查看數據表（PDF） - Alpha and Omega Semiconductor
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AOZ1019AI Datasheet PDF : 14 Pages
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AOZ1019
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected cross-
over frequency. CC can is selected by:
CC
=
---------------1---.--5----------------
2π × RC × f p1
The equation above can also be simplified to:
CC
=
C-----O------×-----R-----L-
RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1019 buck regulator circuit, high pulsing cur-
rent flows through two circuit loops. The first loop starts
from the input capacitors, to the VIN pin, to the LX pins, to
the filter inductor, to the output capacitor and load, and
then return to the input capacitor through ground. Current
flows in the first loop when the high side switch is on. The
second loop starts from inductor, to the output capacitors
and load, to the PGND pin of the AOZ1019, to the LX
pins of the AOZ1019. Current flows in the second loop
when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and PGND pin of the AOZ1019.
In the AOZ1019 buck regulator circuit, the two major
power dissipating components are the AOZ1019 and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
P total _loss = V IN × I IN – V O × I O
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
P inductor _loss = IO2 × R inductor × 1.1
The power dissipation in Schottky can be approximated
as:
P diode_loss = I O × (1 – D ) × V FWSchottky
The actual AOZ1019 junction temperature can be
calculated with power dissipation in the AOZ1019 and
thermal impedance from junction to ambient.
T junction = (P total _loss–P inductor _loss) × ΘJA
+ + T ambient
The maximum junction temperature of AOZ1019 is
150°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for the maximum
load current of the AOZ1019 under different ambient
temperature.
The thermal performance of the AOZ1019 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 illustrates a single
layer PCB layout example as reference.
1. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal dissipation.
2. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise
coupling to the AGND pin. In this case, a decoupling
capacitor should be connected between VIN pin and
AGND pin.
4. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or VOUT.
6. The two LX pins are connected to internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
7. Keep sensitive signal trace such as trace connected
with FB pin and COMP pin far away form the LX pins.
Rev. 1.0 September 2007
www.aosmd.com
Page 10 of 14
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