APL78L05-DC-PBL 查看數據表（PDF） - Anpec Electronics

零件编号

产品描述 (功能)

比赛名单

APL78L05-DC-PBL

Three-Terminal Low Current Positive Voltage Regulator

Anpec Electronics 

APL78L05/12

Classificatin Reflow Profiles(Cont.)

Table 1. SnPb Entectic Process – Package Peak Reflow Tem peratures

Package Thickness

Volume mm3

Volume mm3

<350

≥350

<2.5 mm

240 +0/-5°C

225 +0/-5°C

≥2.5 mm

225 +0/-5°C

225 +0/-5°C

Table 2. Pb-free Process – Package Classification Reflow Tem peratures

Package Thickness

Volume mm3

Volume mm3

Volume mm3

<350

350-2000

>2000

<1.6 mm

260 +0°C*

260 +0°C*

260 +0°C*

1.6 mm – 2.5 mm

260 +0°C*

250 +0°C*

245 +0°C*

≥2.5 mm

250 +0°C*

245 +0°C*

245 +0°C*

*Tolerance: The device manufacturer/supplier shall assure process com patibility up to and

including the stated classification temperature (this m eans Peak reflow tem perature +0°C.

For example 260°C+0°C) at the rated MSL level.

Reliability test program

Test item

SOLDERABILITY

HOLT

PCT

TST

ESD

Latch-Up

Method

MIL-STD-883D-2003

MIL-STD-883D-1005.7

JESD-22-B, A102

MIL-STD-883D-1011.9

MIL-STD-883D-3015.7

JESD 78

Description

245°C , 5 SEC

1000 Hrs Bias @ 125 °C

168 Hrs, 100 % RH , 121°C

-65°C ~ 150°C, 200 Cycles

VHBM > 2KV, VMM > 200V

10ms , Itr > 100mA

Carrier Tape & Reel Dimensions

t

Po

P

D

E

P1

F

W

Bo

Ao

D1

Ko

Copyright  ANPEC Electronics Corp.

12

Rev. A.4 - Oct., 2003

www.anpec.com.tw

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