APW7077 查看數據表（PDF） - Anpec Electronics

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APW7077

PWM Step-Up DC-DC Converter

Anpec Electronics 

APW7077/A

External Component Selection (Cont.)

External Switch Transistor (Cont.)

the controller’s EXT pin must be able to supply the

necessary driving current. Rb can be calculated by

the following equation:

Since the pulse current flows through the transistor,

the exact Rb value should be finely tuned by the

experiment. Generally, a small Rb value can increase

the output current capability, but the efficiency will

decrease due to more energy is used to drive the

transistor. Moreover, a speed–up capacitor, Cb, should

be connected in parallel with Rb to reduce switching

loss and improve efficiency. Cb can be calculated by

the equation below:

It is due to the variation in the characteristics of the

transistor used. The calculated value should be used

as the initial test value and the optimized value should

be obtained by the experiment.

Layout Considerations

Ground Plane

Switching Noise Decoupling Capacitor

One point grounding should be used for the output

power return ground, the input power return ground,

and the device switch ground to reduce noise. The

input ground and output ground traces must be thick

enough for current to flow through and for reducing

ground bounce.

Power Signal Traces

Low resistance conducting paths should be used for

the power carrying traces to reduce power loss so as

to improve efficiency (short and thick traces for con-

necting the inductor L can also reduce stray

inductance). Trace connections made to the inductor

and schottky diode should be minimized to reduce

power dissipation and increase overall efficiency.

Output Capacitor

The output capacitor should be placed close to the

output terminals to obtain better smoothing effect on

the output ripple.

The output capacitor, COUT, should also be placed close

to the IC. Any copper trace connections for the COUT

capacitor can increase the series resistance, which

directly effects output voltage ripple and efficiency.

On APW7077 fixed voltage application, a 0.1µF ce-

ramic capacitor should be placed close to the VOUT pin

and GND pin of the chip to filter the switching spikes

in the output voltage monitored by the VOUT pin.

Feedback Network

On APW7077A application, the feedback networks

should be connected directly to a dedicated analog

ground plane and this ground plane must connect to

the GND pin. If no analog ground plane is available

then this ground must tie directly to the GND pin. The

feedback network, resistors R1 and R2, should be kept

close to the FB pin, and away from the inductor, to

minimize copper trace connections that can inject noise

into the system.

Input Capacitor

In APW7077A high output voltage application circuit,

the input voltage(VIN) is tied to chip supply pin(VDD).

The input capacitor CIN in VIN must be placed close to

the IC. This will reduce copper trace resistance which

effects input voltage ripple of the IC. For additional

input voltage filtering, a 1µF capacitor can be placed

in parallel with CIN, close to the VDD pin, to shunt any

high frequency noise to ground.

Copyright © ANPEC Electronics Corp.

16

Rev. A.4 - Sep, 2005

www.anpec.com.tw

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