AS7C33256PFS32A 查看數據表（PDF） - Alliance Semiconductor
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AS7C33256PFS32A Datasheet PDF : 20 Pages
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AS7C33256PFS32A
AS7C33256PFS36A
®
Synchronous truth table[4]
CE01 CE1 CE2 ADSP ADSC ADV WRITE[2] OE Address accessed
H
X
X
X
L
X
X
X
NA
L
L
X
L
XX
X
X
NA
L
L
X
H
LX
X
X
NA
L
X
H
L
XX
X
X
NA
L
X
H
H
LX
X
X
NA
L
H
L
L
XX
X
L
External
L
H
L
L
XX
X
H
External
L
H
L
H
LX
H
L
External
L
H
L
H
LX
H
H
External
X
X
X
H
H
L
H
L
Next
X
X
X
H
H
L
H
H
Next
X
X
X
H
HH
H
L
Current
X
X
X
H
HH
H
H
Current
H
X
X
X
H
L
H
L
Next
H
X
X
X
H
L
H
H
Next
H
X
X
X
HH
H
L
Current
H
X
X
X
HH
H
H
Current
L
H
L
H
LX
L
X
External
X
X
X
H
H
L
L
X
Next
H
X
X
X
H
L
L
X
Next
X
X
X
H
HH
L
X
Current
H
X
X
X
HH
L
X
Current
CLK
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
Operation
Deselect
Deselect
Deselect
Deselect
Deselect
Begin read
Begin read
Begin read
Begin read
Continue read
Continue read
Suspend read
Suspend read
Continue read
Continue read
Suspend read
Suspend read
Begin write
Continue write
Continue write
Suspend write
Suspend write
DQ
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
Q
Hi−Z
D3
D
D
D
D
1 X = don’t care, L = low, H = high
2 For WRITE, L means any one or more byte write enable signals (BWa, BWb, BWc or BWd) and BWE are LOW or GWE is LOW. WRITE = HIGH for all
BWx, BWE, GWE HIGH. See "Write enable truth table (per byte)," on page 6 for more information.
3 For write operation following a READ, OE must be high before the input data set up time and held high throughout the input hold time
4 ZZ pin is always Low.
11/30/04, v.3.1
Alliance Semiconductor
P. 7 of 20
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