AT80C5112 查看數據表（PDF） - Atmel Corporation
零件编号
产品描述 (功能)
比赛名单
AT80C5112 Datasheet PDF : 97 Pages
| |||
Timer 0: Clock Inputs
Registers
Clock Control Register
CkIdle
:6
T0 pin
0
Sub Clock
1
SCLKT0
OSCCON
0
1
C/T
TMOD
Control
Timer 0
Gate
INT0
TR0
The SCLKT0 bit in OSCCON register allows to select Timer 0 Subsidiary clock. This
allows to perform a Real-Time Clock function.
SCLKT0 = 0: Timer 0 uses the standard T0 pin as clock input (Standard mode).
SCLKT0 = 1: Timer 0 uses the special Sub Clock as clock input.
When the subclock input is selected for Timer 0 and the crystal oscillator is selected for
CPU and peripherals, the CKRL prescaler must be set to FF (division factor 2) in order
to assure a proper count on Timer 0.
With an external a 32 kHz oscillator, the timer interrupt can be set from 1/256 to 256
seconds to perform a Real-Time Clock (RTC) function. The power consumption will be
very low as the CPU is in idle mode at 32 kHz most of the time. When more CPU power
is needed, the internal RC oscillator is activated and used by the CPU and the others
peripherals.
The clock control register is used to define the clock system behavior.
Table 2. OSCCON - Clock Control Register (8Fh)
7
6
5
4
3
2
1
0
-
-
-
-
-
SCLKT0 OSCBEN OSCAEN
Bit
Number
7
6
5
4
3
Bit
Mnemonic
-
-
-
-
-
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
10 AT8xC5112
4191C–8051–02/08
Share Link: 