SM6453AB(2001) 查看數據表（PDF） - Nippon Precision Circuits

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SM6453AB
(Rev.:2001)

3-wire Serial Data Volume Control for Headphone Amplifiers IC

Nippon Precision Circuits  

SM6453AB

FUNCTIONAL DESCRIPTION

Microcontroller Interface

The SM6453AB uses a serial microcontroller interface comprising MDT (data), MCK (clock), MLEN (latch

enable).

Data format

The data transfer format is shown in figure 1.

MDT

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

MCK

MLEN

Figure 1. Microcontroller data input timing

The internal shift register shifts data on the rising edge of MCK, and the data is loaded and updated on the ris-

ing edge of MLEN (the dotted lines are all valid data timing). Each cycle is completed by 16 or more MCK

input cycles, even if there are unused data bits.

NIPPON PRECISION CIRCUITS—9

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