BL7448SM 查看數據表（PDF） - Shanghai Belling Co., Ltd.
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BL7448SM Datasheet PDF : 7 Pages
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BL7448SM Intelligent 8K-bit
EEPROM
After eight successive unsuccessful comparisons the error counter blocks any subsequent
attempt, and hence any possibility to write and erase.
Reset and Answer-to-Reset
*Reset
After connecting the operating voltage to Vcc, the chip will hold and wait the operation of reset. The
operation of reset begins with RST from L to H, and ends with CLK from L to H. During the operation of
reset, all commands will be ignored.
After power on reset, the operation of reading must be execute before data can be altered.
.
*Answer-to-Reset
Answer-to-Reset set the address counter to zero and output the first data. The other data can be read
with CLK signal.
Command
RST
1
0
RST
I/O
Command Input
Data Output
Byte1
Command
Byte2 Byte3
Address Data
Operation
Mode
S0 S1 S2 S3 S4 S5 A8 A9 A0~A7
D0~D7
Updata main
100011
Data
memory
Processing
& protection memory
110011
Data
Updata main
memory
Processing
000011
Write protection
Comp. data memory
Processing
001100
Read main memory
No effect
Data Output
& protection memory
011100
No effect Read main memory Data Output
VCC
RST
CLK
I/O
1 23
123
31 32
31 32
IC sets I/O
to State H
RST
td4
CLK
I/O
td4
td2 tH
tL
td5
Figure 3 Reset and Answer-to-Reset
http://www.belling.com.cn
-3-
Total 7 Pages
8/16/2006
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