BS616LV4023DC 查看數據表（PDF） - Brilliance Semiconductor
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BS616LV4023DC
Brilliance Semiconductor
BS616LV4023DC Datasheet PDF : 11 Pages
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BSI
AC TEST CONDITIONS
Input Pulse Levels
Vcc/0V
Input Rise and Fall Times 5ns
Input and Output
Timing Reference Level
Output Load
0.5Vcc
CL=100pF+1TTL
BS616LV4023
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC, Vcc=3.0V)
READ CYCLE
JEDEC
PARAMETER
NAME
t
AVAX
PARAMETER
NAME
t
RC
t
t
AVQV
AA
t
E1LQV
t
ACS1
t
E2LQV
t
ACS2
t
t (1)
BA
BA
t
t
GLQV
OE
t
ELQX
t
CLZ
t
t
BE
BE
t
GLQX
t
OLZ
t
EHQZ
t
CHZ
t
BDO
t
BDO
t
GHQZ
t
OHZ
t
t
AXOX
OH
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Access Time
Data Byte Control Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Data Byte Control to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Data Byte Control to Output High Z
Output Disable to Output in High Z
Output Disable to Address Change
BS616LV4023-70
MIN. TYP. MAX.
70 --
--
--
(CE1) --
(CE2) --
(LB,UB) --
-- 70
-- 70
-- 70
-- 35
--
-- 35
(CE1,CE2) 10 --
--
(LB,UB) 10 --
--
10 --
--
(CE1,CE2) 0
-- 35
(LB, UB) 0
-- 35
0
-- 30
10 --
--
NOTE :
1. tBA is 35ns/50ns (@speed=70ns/100ns) with address toggle .
tBA is 70ns/100ns (@speed=70ns/100ns) without address toggle .
BS616LV4023-10
MIN. TYP. MAX.
100 --
--
--
-- 100
--
-- 100
--
-- 100
--
-- 50
--
-- 50
15 --
--
15 --
--
15 --
--
0
-- 40
0
-- 40
0
-- 35
15 --
--
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS616LV4023
6
Revision 2.0
April 2002
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